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Fully-Automated Testing of Silicon Photonics at Wafer Level

PI's F-712.HA2 double-sided fiber alignment system
In the CM300xi SiPh wafer probing station from FormFactor, PI's F-712.HA2 double-sided fiber alignment system actively aligns signal-carrying glass fibers to photonic structures on silicon photonic wafers

The integration of photonic structures or elements (e.g. waveguides, laser and photodiodes, multiplexer) on a silicon chip presents, already at wafer level, a multitude of new challenges for the testing technology of these elements. In order to transmit the design of the structure, from the concept through its qualification up to series production, a very large amount of performance data of the respective element is required.

When taking into account the high process cost up until when the SiPh chip is finally packaged, faulty chips should be identified early on so that they can be removed from the ongoing manufacturing process.

For an effective and efficient implementation of this task, FormFactor has developed fully-automated SiPh wafer probers. Many process steps employed here, follow established standards in the semiconductor industry. However, for testing the functionality and quality of photonic structures, the optical properties must also be tested. For this purpose, signal-carrying glass fibers must be aligned with high precision to the photonic element to be tested. The alignment must be made in six degrees of freedom (for both, shifts and rotations) since the test only delivers conclusive information with an optimal optical power coupling. In the SiPh wafer probers from FormFactor, PI's Fast Multi-Channel Photonics Alignment-System (FMPA) takes on this central task.

Sophisticated Alignment Process

The alignment process is subject to a series of highly challenging requirements. In particular:

 

  • Maintaining the optimum distance between the probe (glass fiber) and photonic structure in order to minimize the loss of signal and to ideally simulate the operating conditions
  • Aligning in all six degrees of freedom in order to best superimpose the optical axis of the structure to be tested with the test fiber
  • Optimizing the position in the shortest time
  • Avoiding a physical contact between the probe and the wafer at all costs

 

The initial goal of the listed requirements is to be able to react with high flexibility to differing chip designs. Edge emitters, for example, require a horizontal alignment of the test fiber, whereas grating couplers require a vertical alignment at wafer level. With the alignment on edge emitters, testing at die-level also becomes possible.

PI Silicon Photonics Probing Edge Coupling Singulated
The best coupling efficiency for applications with high bandwidth can be reached if fibers / arrays (right) are placed as close as possible to the exposed waveguide facets by the horizontal die-level edge coupling. The real edge coupling makes an exact simulation of real-life conditions possible, which come very close to the actual application
An edge coupling at wafer level is now possible
An edge coupling at wafer level is now possible with a new innovative combination of hardware and software functionalities in order to align and optimize fibers / arrays in a trench at wafer level
Vertical alignment to grating couplers at wafer level
The vertical alignment to grating couplers at wafer level requires its own mechanics for guiding the fibers

Photos: Courtesy FormFactor

The high speed of the alignment process is a further important goal for achieving an economical series production of SiPh components. Thousands of photonic structures are present on a wafer. The faster the alignment of the signal-carrying glass fibers, the faster and, therefore, more economical the test. The FMPA systems from PI position glass fibers and photonic structures in FormFactor's silicon photonic wafer probers in a fraction of a second. This makes the testing of a wafer in hours or a few days possible, instead of conventionally taking weeks or even months.

Despite the speed and precision, it is absolutely necessary to avoid a direct contact between the probe and wafer. Behind this requirement, the goal is to avoid direct damage to chip structures and the formation of particles. For this purpose, sensor technologies from PI are also being employed.

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